Full metadata record
DC pole | Hodnota | Jazyk |
---|---|---|
dc.contributor.author | Avedillo, M. J. | |
dc.contributor.author | Barriga, A. | |
dc.contributor.author | Acasandrei, L. | |
dc.contributor.author | Calahorro, J. M. | |
dc.contributor.editor | Skala, Václav | |
dc.date.accessioned | 2018-04-12T07:40:10Z | - |
dc.date.available | 2018-04-12T07:40:10Z | - |
dc.date.issued | 2016 | |
dc.identifier.citation | WSCG 2016: poster papers proceedings: 24th International Conference in Central Europe on Computer Graphics, Visualization and Computer Visionin co-operation with EUROGRAPHICS Association, p. 29-32. | en |
dc.identifier.isbn | 978-80-86943-59-6 | |
dc.identifier.issn | 2464-4617 | |
dc.identifier.uri | wscg.zcu.cz/WSCG2016/!!_CSRN-2603.pdf | |
dc.identifier.uri | http://hdl.handle.net/11025/29587 | |
dc.description.abstract | This paper describes the design and implementation of a hardware-software embedded system for face recognition applications in images and/or videos. The system has hardware components to speed up the face detection and recognition stages. It is a system suitable for applications requiring real-time, due that the response times are deterministic and bounded. The system is based on a previous implementation that had accelerated the image capturing process, and the face detection. This paper will focuses in the face recognition acceleration. | en |
dc.format | 4 s. | cs |
dc.format.mimetype | application/pdf | |
dc.language.iso | en | en |
dc.publisher | Václav Skala - UNION Agency | en |
dc.relation.ispartofseries | WSCG 2016: poster papers proceedings | en |
dc.rights | © Václav Skala - Union Agency | cs |
dc.subject | souběžný návrh technického a programového vybavení | cs |
dc.subject | vestavěný systém | cs |
dc.subject | rozpoznání obličeje | cs |
dc.subject | FPGA implementace | cs |
dc.subject | syntéza na vysoké úrovni | cs |
dc.title | Hardware-software embedded face recognition system | en |
dc.type | konferenční příspěvek | cs |
dc.type | conferenceObject | en |
dc.rights.access | openAccess | en |
dc.type.version | publishedVersion | en |
dc.subject.translated | hardware-software codesign | en |
dc.subject.translated | embedded system | en |
dc.subject.translated | face recognition | en |
dc.subject.translated | FPGA implementations | en |
dc.subject.translated | high level synthesis | en |
dc.type.status | Peer-reviewed | en |
Vyskytuje se v kolekcích: | WSCG 2016: Poster Papers Proceedings |
Soubory připojené k záznamu:
Soubor | Popis | Velikost | Formát | |
---|---|---|---|---|
Avedillo.pdf | Plný text | 384,56 kB | Adobe PDF | Zobrazit/otevřít |
Použijte tento identifikátor k citaci nebo jako odkaz na tento záznam:
http://hdl.handle.net/11025/29587
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