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dc.contributor.authorBenešová, Andrea
dc.contributor.authorHirman, Martin
dc.contributor.authorHlína, Jiří
dc.contributor.authorTupa, Jiří
dc.contributor.authorSteiner, František
dc.contributor.authorŘeboun, Jan
dc.date.accessioned2021-03-08T11:00:20Z-
dc.date.available2021-03-08T11:00:20Z-
dc.date.issued2020
dc.identifier.citationBENEŠOVÁ, A. HIRMAN, M. HLÍNA, J. TUPA, J. STEINER, F. ŘEBOUN, J. Optimization of contacting technological process on printed conductive pattern for wearable electronics. In: Proceedings of the International Spring Seminar on Electronics Technology, ISSE 2020. Piscaway: IEEE, 2020. s. 1-6. ISBN 978-1-72816-773-2.cs
dc.identifier.isbn978-1-72816-773-2
dc.identifier.uri2-s2.0-85087617768
dc.identifier.urihttp://hdl.handle.net/11025/42806
dc.format6 s.cs
dc.format.mimetypeapplication/pdf
dc.language.isoenen
dc.publisherIEEEen
dc.relation.ispartofseriesProceedings of the International Spring Seminar on Electronics Technology, ISSE 2020en
dc.rightsPlný text je přístupný v rámci univerzity přihlášeným uživatelům.cs
dc.rights© IEEEen
dc.titleOptimization of contacting technological process on printed conductive pattern for wearable electronicsen
dc.typekonferenční příspěvekcs
dc.typeconferenceObjecten
dc.rights.accessrestrictedAccessen
dc.type.versionpublishedVersionen
dc.description.abstract-translatedThis paper describes the testing of soldering on flexible substrates (PET, Kapton) with fully printed silver conductive pattern. Prior to testing, the technological process was mapped and modeled using a software tool, called ARIS. In the next step all possible causes were defined using the Ishikawa diagram. Then the initial test was realized with poor results. After this test, the risks of the process were evaluated by the risk analysis. The second experiment was realized in the next step according to the performed analysis. The results of this experiment were much better and one of the used settings can be used for future applications.en
dc.subject.translatedconducting materialsen
dc.subject.translatedelectronic engineering computingen
dc.subject.translatedflexible electronicsen
dc.subject.translatedrisk analysisen
dc.subject.translatedsilver alloysen
dc.subject.translatedsoftware toolsen
dc.subject.translatedsolderingen
dc.subject.translatedtestingen
dc.identifier.doi10.1109/ISSE49702.2020.9120877
dc.type.statusPeer-revieweden
dc.identifier.obd43929926
dc.project.IDEF18_069/0009855/Elektrotechnické technologie s vysokým podílem vestavěné inteligencecs
dc.project.IDSGS-2018-016/Diagnostika a materiály v elektrotechnicecs
Appears in Collections:Konferenční příspěvky / Conference Papers (KET)
Konferenční příspěvky / Conference papers (RICE)
Konferenční příspěvky / Conference papers (KET)
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