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DC poleHodnotaJazyk
dc.contributor.authorBrenkuš, Juraj
dc.contributor.authorStopjaková, Viera
dc.contributor.authorChovanec, Jakub
dc.contributor.authorLachkovič, Ján
dc.contributor.editorPinker, Jiří
dc.date.accessioned2019-10-17T08:18:35Z
dc.date.available2019-10-17T08:18:35Z
dc.date.issued2018
dc.identifier.citation2018 International Conference on Applied Electronics: Pilsen, 11th – 12th September 2018, Czech Republic, p. 7-10.en
dc.identifier.isbn978–80–261–0721–7
dc.identifier.issn1803–7232
dc.identifier.urihttp://hdl.handle.net/11025/35459
dc.format4 s.cs
dc.format.mimetypeapplication/pdf
dc.language.isoenen
dc.publisherZápadočeská univerzita v Plznics
dc.rights© Západočeská univerzita v Plznics
dc.subjectpřeměna energiecs
dc.subjectnízký výkoncs
dc.subjectbuck convertercs
dc.titleNon-isolated AC/DC Energy Converter for Smart Grid Sensor Nodesen
dc.typekonferenční příspěvekcs
dc.typeconferenceObjecten
dc.rights.accessopenAccessen
dc.type.versionpublishedVersionen
dc.description.abstract-translatedThis paper present an AC/DC converter topology for sub 0.5 W applications. The presented results are based on preliminary transistor level simulations of the circuit topology in Cadence® Virtuoso® Analog Design Environment. The technology used was a 50 V CMOS process, while the HV devices (400 V) were considered as external components and modelled accordingly. 3 HV MOS devices and 4 external passive components are required by this topology. The simulation results show efficiency more than 70% for two stage configuration, when the rectifier and buck converter is used, and more than 60% for three stage configuration, when the additional low dropout regulator is also used. Moreover, the topology shows a no-load consumption less than 15 mW for both of the configurations.en
dc.subject.translatedpower conversionen
dc.subject.translatedlow poweren
dc.subject.translatedbuck converteren
dc.type.statusPeer-revieweden
Vyskytuje se v kolekcích:Applied Electronics 2018
Applied Electronics 2018

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