Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Šovčík, Michal | |
| dc.contributor.author | Stopjaková, Viera | |
| dc.contributor.author | Arbet, Daniel | |
| dc.contributor.author | Nagy, Lukáš | |
| dc.contributor.author | Kováč, Martin | |
| dc.contributor.editor | Pinker, Jiří | |
| dc.date.accessioned | 2019-10-17T12:29:38Z | |
| dc.date.available | 2019-10-17T12:29:38Z | |
| dc.date.issued | 2018 | |
| dc.identifier.citation | 2018 International Conference on Applied Electronics: Pilsen, 11th – 12th September 2018, Czech Republic, 131-136. | en |
| dc.identifier.isbn | 978–80–261–0721–7 | |
| dc.identifier.issn | 1803–7232 | |
| dc.identifier.uri | http://hdl.handle.net/11025/35488 | |
| dc.format | 6 s. | cs |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | en | en |
| dc.publisher | Západočeská univerzita v Plzni | cs |
| dc.rights | © Západočeská univerzita v Plzni | cs |
| dc.subject | kolísání teploty procesního napětí | cs |
| dc.subject | digitální kalibrace | cs |
| dc.subject | zesilovač s proměnným ziskem | cs |
| dc.subject | vstupní offsetové napětí | cs |
| dc.title | Digital Calibration of Operational Amplifiers and Influence of Calibration Circuitry | en |
| dc.type | konferenční příspěvek | cs |
| dc.type | conferenceObject | en |
| dc.rights.access | openAccess | en |
| dc.type.version | publishedVersion | en |
| dc.description.abstract-translated | This paper presents the implementation of a digital calibration method for a variable-gain amplifier (VGA), where the amplifier input offset voltage is the calibration target. The whole system is implemented in 130 nm CMOS technology using the supply voltage of 600 mV. Firstly,fundamentals of calibration circuitry operation are described, followed by detailed explanation of the proposed implementation. Then, investigation of possible undesired effects of calibration circuitry on the amplifier characteristics is performed. The whole calibration system was verified through simulation for various temperatures using Cadence environment and BSIM3v3 transistor model version. The VGA was calibrated within the temperature range from -20°C to 60°C, in which standard deviation of the input offset voltage reaches less than 802 μV and mean value is at most 450 μV. Using the calibration, the standard deviation is reduced to 35% compared to the VGA without the calibration, while the change of mean value is rather negligible. | en |
| dc.subject.translated | process-voltage-temperature variations | en |
| dc.subject.translated | digital calibration | en |
| dc.subject.translated | variable-gain amplifier | en |
| dc.subject.translated | input offset voltage | en |
| dc.type.status | Peer-reviewed | en |
| Appears in Collections: | Applied Electronics 2018 Applied Electronics 2018 | |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Sovcik.pdf | Plný text | 8,53 MB | Adobe PDF | View/Open |
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